G-MPSoC: Generic Massively Parallel ...
Document type :
Compte-rendu et recension critique d'ouvrage
Title :
G-MPSoC: Generic Massively Parallel Architecture on FPGA
Author(s) :
Krichene, Hana [Auteur]
Dynamic Reconfigurable Massively Parallel Architectures and Languages [DREAMPAL]
Baklouti, Mouna [Auteur]
Computer & Embedded Systems [CES Lab]
Abid, Mohamed [Auteur]
Computer & Embedded Systems [CES Lab]
Marquet, Philippe [Auteur]
Dynamic Reconfigurable Massively Parallel Architectures and Languages [DREAMPAL]
Dekeyser, Jean-Luc [Auteur]
Dynamic Reconfigurable Massively Parallel Architectures and Languages [DREAMPAL]
Dynamic Reconfigurable Massively Parallel Architectures and Languages [DREAMPAL]
Baklouti, Mouna [Auteur]
Computer & Embedded Systems [CES Lab]
Abid, Mohamed [Auteur]
Computer & Embedded Systems [CES Lab]
Marquet, Philippe [Auteur]

Dynamic Reconfigurable Massively Parallel Architectures and Languages [DREAMPAL]
Dekeyser, Jean-Luc [Auteur]
Dynamic Reconfigurable Massively Parallel Architectures and Languages [DREAMPAL]
Journal title :
WSEAS Transactions on circuits and systems
Publisher :
World Scientific and Engineering Academy and Society (WSEAS)
Publication date :
2015-11-01
ISSN :
1109-2734
English keyword(s) :
Generic architecture
MPP
FPGA
IP-reused
parallelism
Key–Words: SoC
MPP
FPGA
IP-reused
parallelism
Key–Words: SoC
HAL domain(s) :
Informatique [cs]/Systèmes embarqués
English abstract : [en]
Nowadays, recent intensive signal processing applications are evolving and are characterized by the diversity of algorithms (filtering, correlation, etc.) and their numerous parameters. Having a flexible and pro-grammable ...
Show more >Nowadays, recent intensive signal processing applications are evolving and are characterized by the diversity of algorithms (filtering, correlation, etc.) and their numerous parameters. Having a flexible and pro-grammable system that adapts to changing and various characteristics of these applications reduces the design cost. In this context, we propose in this paper Generic Massively Parallel architecture (G-MPSoC). G-MPSoC is a System-on-Chip based on a grid of clusters of Hardware and Software Computation Elements with different size, performance, and complexity. It is composed of parametric IP-reused modules: processor, controller, accelerator, memory, interconnection network, etc. to build different architecture configurations. The generic structure of G-MPSoC facilitates its adaptation to the intensive signal processing applications requirements. This paper presents G-MPSoC architecture and details its different components. The FPGA-based implementation and the experimental results validate the architectural model choice and show the effectiveness of this design.Show less >
Show more >Nowadays, recent intensive signal processing applications are evolving and are characterized by the diversity of algorithms (filtering, correlation, etc.) and their numerous parameters. Having a flexible and pro-grammable system that adapts to changing and various characteristics of these applications reduces the design cost. In this context, we propose in this paper Generic Massively Parallel architecture (G-MPSoC). G-MPSoC is a System-on-Chip based on a grid of clusters of Hardware and Software Computation Elements with different size, performance, and complexity. It is composed of parametric IP-reused modules: processor, controller, accelerator, memory, interconnection network, etc. to build different architecture configurations. The generic structure of G-MPSoC facilitates its adaptation to the intensive signal processing applications requirements. This paper presents G-MPSoC architecture and details its different components. The FPGA-based implementation and the experimental results validate the architectural model choice and show the effectiveness of this design.Show less >
Language :
Anglais
Popular science :
Non
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