G-MPSoC: Generic Massively Parallel Architecture on FPGA

Krichene, Hana; Baklouti, Mouna; Abid, Mohamed; Marquet, Philippe; Dekeyser, Jean-Luc

Type de document :

Article dans une revue scientifique: Article original

Titre :

G-MPSoC: Generic Massively Parallel Architecture on FPGA

Auteur(s) :

Krichene, Hana [Auteur]
Dynamic Reconfigurable Massively Parallel Architectures and Languages [DREAMPAL]
Baklouti, Mouna [Auteur]
Computer & Embedded Systems [CES Lab]
Abid, Mohamed [Auteur]
Computer & Embedded Systems [CES Lab]
Marquet, Philippe [Auteur]

Dynamic Reconfigurable Massively Parallel Architectures and Languages [DREAMPAL]
Dekeyser, Jean-Luc [Auteur]

Dynamic Reconfigurable Massively Parallel Architectures and Languages [DREAMPAL]

Titre de la revue :

WSEAS Transactions on circuits and systems

Éditeur :

World Scientific and Engineering Academy and Society (WSEAS)

Date de publication :

2015-11-01

ISSN :

1109-2734

Mot(s)-clé(s) en anglais :

Generic architecture
MPP
FPGA
IP-reused
parallelism
Key–Words: SoC

Discipline(s) HAL :

Informatique [cs]/Systèmes embarqués

Résumé en anglais : [en]

Nowadays, recent intensive signal processing applications are evolving and are characterized by the diversity of algorithms (filtering, correlation, etc.) and their numerous parameters. Having a flexible and pro-grammable ...
Lire la suite >Nowadays, recent intensive signal processing applications are evolving and are characterized by the diversity of algorithms (filtering, correlation, etc.) and their numerous parameters. Having a flexible and pro-grammable system that adapts to changing and various characteristics of these applications reduces the design cost. In this context, we propose in this paper Generic Massively Parallel architecture (G-MPSoC). G-MPSoC is a System-on-Chip based on a grid of clusters of Hardware and Software Computation Elements with different size, performance, and complexity. It is composed of parametric IP-reused modules: processor, controller, accelerator, memory, interconnection network, etc. to build different architecture configurations. The generic structure of G-MPSoC facilitates its adaptation to the intensive signal processing applications requirements. This paper presents G-MPSoC architecture and details its different components. The FPGA-based implementation and the experimental results validate the architectural model choice and show the effectiveness of this design.Lire moins >

Langue :

Anglais

Comité de lecture :

Oui

Audience :

Internationale

Vulgarisation :

Non

Collections :

Centre de Recherche en Informatique, Signal et Automatique de Lille (CRIStAL) - UMR 9189

Source :

Harvested from HAL

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