Title :

Foreground Static Error Calibration for Current Sources Using Backgate Body Biasing

Author(s) :

Beauquier, Clément [Auteur correspondant]
Microélectronique Silicium - IEMN [MICROELEC SI - IEMN]
Laboratoire Traitement et Communication de l'Information [LTCI]
STMicroelectronics [Grenoble] [ST-GRENOBLE]
David, Duperray [Auteur]
STMicroelectronics
Jabbour, Chadi [Auteur]
Circuits et Systèmes de Communication [C2S]
Desgreys, Patricia [Auteur]
Circuits et Systèmes de Communication [C2S]
Frappé, Antoine [Auteur]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Microélectronique Silicium - IEMN [MICROELEC SI - IEMN]
Kaiser, Andreas [Auteur]
Microélectronique Silicium - IEMN [MICROELEC SI - IEMN]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]

Conference title :

IEEE RTSI 2022

City :

Paris

Country :

France

Start date of the conference :

2022-08-24

English keyword(s) :

CMOS
28 nm FDSOI
Current Source
Current Steering
Foreground Calibration
Body Biasing
Digital to Analog Converter
Amplitude Calibration

HAL domain(s) :

Sciences de l'ingénieur [physics]

English abstract : [en]

This work presents a detection and calibration circuit for current sources static mismatch introduced by the process of fabrication. The current is corrected through backgate body bias voltage control, which has the benefit ...
Show more >This work presents a detection and calibration circuit for current sources static mismatch introduced by the process of fabrication. The current is corrected through backgate body bias voltage control, which has the benefit of reduced additional parasitic elements, compared to more classic amplitude calibration or sort-and-map solutions. The main application are high speed and high resolution current steering Digital to Analog Converters (DAC). The calibration circuit is applied on a 2 timeinterleaved (TI) DAC, with 12 bits of resolution and sampled at a frequency of 16 GHz. Its main requirement is to be able to generate signals up to the Nyquist Band (8 GHz) with Spurious Free Dynamic Range (SFDR) of at least 70 dBFS. We validate the method with a schematic 28 nm FDSOI CMOS transistor level testbench, Montecarlo simulations and temperature variations from 27 °C to 125 °C.Show less >

Language :

Anglais

Peer reviewed article :

Oui

Audience :

Internationale

Popular science :

Non

Collections :

• Institut d'Électronique, de Microélectronique et de Nanotechnologie (IEMN) - UMR 8520

Source :

Harvested from HAL