ViPar: High-Level Design Space Exploration for Parallel Video Processing Architectures

Ali, Karim Mohamed Abedallah; Ben Atitallah, Rabie; Ait El Cadi, Abdessamad; Fakhfakh, Nizar; Dekeyser, Jean-Luc

Type de document :

Compte-rendu et recension critique d'ouvrage

DOI :

10.1155/2019/4298013

Titre :

ViPar: High-Level Design Space Exploration for Parallel Video Processing Architectures

Auteur(s) :

Ali, Karim Mohamed Abedallah [Auteur]
Laboratoire d'Automatique, de Mécanique et d'Informatique industrielles et Humaines - UMR 8201 [LAMIH]
Ben Atitallah, Rabie [Auteur]
Ait El Cadi, Abdessamad [Auteur]
Laboratoire d'Automatique, de Mécanique et d'Informatique industrielles et Humaines - UMR 8201 [LAMIH]
INSA Institut National des Sciences Appliquées Hauts-de-France [INSA Hauts-De-France]
Fakhfakh, Nizar [Auteur]
Dekeyser, Jean-Luc [Auteur]

Centre de Recherche en Informatique, Signal et Automatique de Lille - UMR 9189 [CRIStAL]

Titre de la revue :

International Journal of Reconfigurable Computing

Éditeur :

Hindawi Publishing Corporation

Date de publication :

2019-11-14

ISSN :

1687-7195

Discipline(s) HAL :

Informatique [cs]/Systèmes embarqués

Résumé en anglais : [en]

Embedded video applications are now involved in sophisticated transportation systems like autonomous vehicles and driver assistance systems. As silicon capacity increases, the design productivity gap grows up for the current ...
Lire la suite >Embedded video applications are now involved in sophisticated transportation systems like autonomous vehicles and driver assistance systems. As silicon capacity increases, the design productivity gap grows up for the current available design tools. Hence, high-level synthesis (HLS) tools emerged in order to reduce that gap by shifting the design efforts to higher abstraction levels. In this paper, we present ViPar as a tool for exploring different video processing architectures at higher design level. First, we proposed a parametrizable parallel architectural model dedicated for video applications. Second, targeting this architectural model, we developed ViPar tool with two main features: (1) An empirical model was introduced to estimate the power consumption based on hardware utilization and operating frequency. In addition to that, we derived the equations for estimating the hardware utilization and execution time for each design point during the space exploration process. (2) By defining the main characteristics of the parallel video architecture like parallelism level, the number of input/output ports, the pixel distribution pattern, and so on, ViPar tool can automatically generate the dedicated architecture for hardware implementation. In the experimental validation, we used ViPar tool to generate automatically an efficient hardware implementation for a Multiwindow Sum of Absolute Difference stereo matching algorithm on Xilinx Zynq ZC706 board. We succeeded to increase the design productivity by converging rapidly to the appropriate designs that fit with our system constraints in terms of power consumption, hardware utilization, and frame execution time.Lire moins >

Langue :

Anglais

Vulgarisation :

Non

Collections :