Multi-core versus Many-core Computing for ...
Document type :
Compte-rendu et recension critique d'ouvrage
Title :
Multi-core versus Many-core Computing for Many-task Branch-and-Bound applied to Big Optimization Problems
Author(s) :
Melab, Nouredine [Auteur]
Optimisation de grande taille et calcul large échelle [BONUS]
Gmys, Jan [Auteur]
Optimisation de grande taille et calcul large échelle [BONUS]
Université de Mons / University of Mons [UMONS]
Mezmaz, Mohand [Auteur]
Université de Mons / University of Mons [UMONS]
Tuyttens, Daniel [Auteur]
Université de Mons / University of Mons [UMONS]
Optimisation de grande taille et calcul large échelle [BONUS]
Gmys, Jan [Auteur]
Optimisation de grande taille et calcul large échelle [BONUS]
Université de Mons / University of Mons [UMONS]
Mezmaz, Mohand [Auteur]
Université de Mons / University of Mons [UMONS]
Tuyttens, Daniel [Auteur]
Université de Mons / University of Mons [UMONS]
Journal title :
Future Generation Computer Systems
Pages :
20
Publisher :
Elsevier
Publication date :
2018-05-31
ISSN :
0167-739X
English keyword(s) :
Coprocessor/Many-core
Muti-core
Parallel Branch-and-Bound
permutation Flow-Shop
Muti-core
Parallel Branch-and-Bound
permutation Flow-Shop
HAL domain(s) :
Informatique [cs]/Calcul parallèle, distribué et partagé [cs.DC]
Computer Science [cs]/Operations Research [math.OC]
Computer Science [cs]/Operations Research [math.OC]
English abstract : [en]
On the road to exascale, coprocessors are increasingly becoming key building blocks of High Performance Computing platforms. In addition to their energy efficiency, these many-core devices boost the performance of multi-core ...
Show more >On the road to exascale, coprocessors are increasingly becoming key building blocks of High Performance Computing platforms. In addition to their energy efficiency, these many-core devices boost the performance of multi-core processors. In this paper, we revisit the design and implementation of Branch-and-Bound (B&B) algorithms for multi-core processors and Intel Xeon Phi coprocessors considering the offload mode as well as the native one. In addition, two major parallel models are considered: the master-worker and the work pool models. We address several parallel computing issues including processor-coprocessor data transfer optimization and vectorization. The proposed approaches have been experimented using the Flow-Shop scheduling problem (FSP) and two hardware configurations equivalent in terms of energy consumption: Intel Xeon E5-2670 processor and Intel Xeon Phi 5110P coprocessor. The reported results show that: (1) the proposed vectorization mechanism reduces the execution time by 42.1% (resp. 21.2%) in the many-core (resp. multi-core) approach ; (2) the native mode allows a faster execution on MIC than the offload mode for all FSP problem instances ; (3) the many-core approach (offload or native) is in average twice faster than the multi-core approach ; (4) the work pool parallel model is more suited for many/multi-core B&B applied to FSP than the master-worker model becauseof its irregular nature.Show less >
Show more >On the road to exascale, coprocessors are increasingly becoming key building blocks of High Performance Computing platforms. In addition to their energy efficiency, these many-core devices boost the performance of multi-core processors. In this paper, we revisit the design and implementation of Branch-and-Bound (B&B) algorithms for multi-core processors and Intel Xeon Phi coprocessors considering the offload mode as well as the native one. In addition, two major parallel models are considered: the master-worker and the work pool models. We address several parallel computing issues including processor-coprocessor data transfer optimization and vectorization. The proposed approaches have been experimented using the Flow-Shop scheduling problem (FSP) and two hardware configurations equivalent in terms of energy consumption: Intel Xeon E5-2670 processor and Intel Xeon Phi 5110P coprocessor. The reported results show that: (1) the proposed vectorization mechanism reduces the execution time by 42.1% (resp. 21.2%) in the many-core (resp. multi-core) approach ; (2) the native mode allows a faster execution on MIC than the offload mode for all FSP problem instances ; (3) the many-core approach (offload or native) is in average twice faster than the multi-core approach ; (4) the work pool parallel model is more suited for many/multi-core B&B applied to FSP than the master-worker model becauseof its irregular nature.Show less >
Language :
Anglais
Popular science :
Non
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