Reconfigurable Communication Networks in a Parametric SIMD Parallel System on Chip

Baklouti, Mouna; Marquet, Philippe; Dekeyser, Jean-Luc; Abid, Mohamed

Document type :

Communication dans un congrès avec actes

DOI :

10.1007/978-3-642-12133-3_12

Title :

Reconfigurable Communication Networks in a Parametric SIMD Parallel System on Chip

Author(s) :

Baklouti, Mouna [Auteur]
Contributions of the Data parallelism to real time [DART]
Marquet, Philippe [Auteur]

Contributions of the Data parallelism to real time [DART]
Laboratoire d'Informatique Fondamentale de Lille [LIFL]
Dekeyser, Jean-Luc [Auteur]
Contributions of the Data parallelism to real time [DART]
Laboratoire d'Informatique Fondamentale de Lille [LIFL]
Abid, Mohamed [Auteur]
Département de Génie Électrique de Sfax [ENIS] [CEM Lab - ENIS]
Computer & Embedded Systems [CES Lab]

Scientific editor(s) :

Phaophak Sirisuk and Fearghal Morgan and Tarek El-Ghazawi and Hideharu Amano

Conference title :

6th International Symposium on Applied Reconfigurale Computing, ARC 2010

City :

Bangkok

Country :

Thaïlande

Start date of the conference :

2010-03-17

Journal title :

Lecture Notes in Computer Science

Publisher :

Springer

Publication date :

2010

English keyword(s) :

Reconfigurable architectures
communication networks
SIMD processors
parallel architectures
FPGA

HAL domain(s) :

Informatique [cs]/Systèmes embarqués

English abstract : [en]

The SIMD parallel systems play a crucial role in the field of intensive signal processing. For most the parallel systems, communica- tion networks are considered as one of the challenges facing researchers. This work ...
Show more >The SIMD parallel systems play a crucial role in the field of intensive signal processing. For most the parallel systems, communica- tion networks are considered as one of the challenges facing researchers. This work describes the FPGA implementation of two reconfigurable and flexible communication networks integrated into mppSoC. An mppSoC system is an SIMD massively parallel processing System on Chip de- signed for data-parallel applications. Its most distinguished features are its parameterization and the reconfigurability of its interconnection net- works. This reconfigurability allows to establish one configuration with a network topology well mapped to the algorithm communication graph so that higher efficiency can be achieved. Experimental results for mpp- SoC with different communication configurations demonstrate the per- formance of the used reconfigurable networks and the effectiveness of algorithm mapping through reconfiguration.Show less >

Language :

Anglais

Peer reviewed article :

Oui

Audience :

Internationale

Popular science :

Non

Collections :

Centre de Recherche en Informatique, Signal et Automatique de Lille (CRIStAL) - UMR 9189

Source :

Harvested from HAL

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