Title :

Extrinsic base resistance optimization in DPSA-SEG SiGe:C HBTs

Author(s) :

Canderle, Elodie [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Chevalier, Pascal [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
Montagne, A. [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
Moynet, L. [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
Avenier, Gregory [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
Boulenc, Pierre [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
Buczko, M. [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
Carminati, Y. [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
Rosa, J. [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
Gaquiere, Christophe [Auteur]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Chantre, Alain [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]

Conference title :

26th IEEE Bipolar/BiCMOS Circuits and Technology Meeting, BCTM 2012

City :

Portland, OR

Country :

Etats-Unis d'Amérique

Start date of the conference :

2012-09-30

Book title :

Proceedings of 26th IEEE Bipolar/BiCMOS Circuits and Technology Meeting, BCTM 2012

Publication date :

2012

English keyword(s) :

Annealing
Boron
Heterojunction bipolar transistors
Resistance
Epitaxial growth
Junctions
Logic gates

HAL domain(s) :

Sciences de l'ingénieur [physics]

English abstract : [en]

The influence of an additional annealing in the base/emitter module fabrication of state-of-the-art DPSA-SEG SiGe:C HBTs is studied in this paper. The objective of this annealing is to reduce the extrinsic base resistance ...
Show more >The influence of an additional annealing in the base/emitter module fabrication of state-of-the-art DPSA-SEG SiGe:C HBTs is studied in this paper. The objective of this annealing is to reduce the extrinsic base resistance R Bx which in previous studies appeared to limit f MAX of DPSA-SEG SiGe HBTs. TCAD simulations and on-silicon measurements are presented for two different base widths. It is shown that the f MAX increase brought by R BX reduction can be traded for a larger f T . A f T /f MAX frequencies couple reaching 320/390 GHz is demonstrated, associated to a CML ring oscillator gate delay time of 2.2 ps.Show less >

Language :

Anglais

Peer reviewed article :

Oui

Audience :

Internationale

Popular science :

Non

Collections :

• Institut d'Électronique, de Microélectronique et de Nanotechnologie (IEMN) - UMR 8520

Source :

Harvested from HAL