FPGA-based many-core System-on-Chip design

Baklouti, Mouna; Marquet, Philippe; Dekeyser, Jean-Luc; Abid, Mohamed

Document type :

Article dans une revue scientifique

DOI :

10.1016/j.micpro.2015.03.007

Title :

FPGA-based many-core System-on-Chip design

Author(s) :

Baklouti, Mouna [Auteur]
Computer & Embedded Systems [CES Lab]
Marquet, Philippe [Auteur]

Dynamic Reconfigurable Massively Parallel Architectures and Languages [DREAMPAL]
Dekeyser, Jean-Luc [Auteur]
Dynamic Reconfigurable Massively Parallel Architectures and Languages [DREAMPAL]
Abid, Mohamed [Auteur]
Computer & Embedded Systems [CES Lab]

Journal title :

Microprocessors and Microsystems: Embedded Hardware Design

Pages :

Publisher :

Elsevier

Publication date :

2015

ISSN :

0141-9331

HAL domain(s) :

Informatique [cs]

English abstract : [en]

Massively parallel architectures are proposed as a promising solution to speed up data-intensive applications and provide the required computational power. In particular, Single Instruction Multiple Data (SIMD) many-core ...
Show more >Massively parallel architectures are proposed as a promising solution to speed up data-intensive applications and provide the required computational power. In particular, Single Instruction Multiple Data (SIMD) many-core architec-tures have been adopted for multimedia and signal processing applications with massive amounts of data parallelism where both performance and flexible programmability are important metrics. However, this class of processors has faced many challenges due to its increasing fabrication cost and design complexity. Moreover, the increasing gap between design productivity and chip complexity requires new design methods. Nowadays, the recent evolution of silicon integration technology, on the one hand, and the wide usage of reusable Intellectual Property (IP) cores and FPGAs (Field Pro-grammable Gate Arrays), on the other hand, are attractive solutions to meet these challenges and reduce the time-to-market. The objective of this work is to study the performances of massively parallel SIMD on-chip architecturesShow less >

Language :

Anglais

Peer reviewed article :

Oui

Audience :

Internationale

Popular science :

Non

Collections :

Centre de Recherche en Informatique, Signal et Automatique de Lille (CRIStAL) - UMR 9189

Source :

Harvested from HAL

Files

https://hal.inria.fr/hal-01144977/document
Open access
Access the document

https://hal.inria.fr/hal-01144977/document
Open access
Access the document

https://hal.inria.fr/hal-01144977/document
Open access
Access the document

FPGA-based many-core System-on-Chip design BibTeX CSV Excel RIS

Files

FPGA-based many-core System-on-Chip design

BibTeX

CSV

Excel

RIS