Master-Slave Control structure for massively parallel System on Chip

Krichene, Hana; Baklouti, Mouna; Dekeyser, Jean-Luc; Marquet, Philippe; Abid, Mohamed

Type de document :

Communication dans un congrès avec actes

Titre :

Master-Slave Control structure for massively parallel System on Chip

Auteur(s) :

Krichene, Hana [Auteur]
Dynamic Reconfigurable Massively Parallel Architectures and Languages [DREAMPAL]
Computer & Embedded Systems [CES Lab]
Baklouti, Mouna [Auteur]
Computer & Embedded Systems [CES Lab]
Dekeyser, Jean-Luc [Auteur]
Dynamic Reconfigurable Massively Parallel Architectures and Languages [DREAMPAL]
Marquet, Philippe [Auteur]

Dynamic Reconfigurable Massively Parallel Architectures and Languages [DREAMPAL]
Abid, Mohamed [Auteur]
Computer & Embedded Systems [CES Lab]

Titre de la manifestation scientifique :

DSD SEAA - 16th Euromicro Conference on Digital System Design

Ville :

Santander

Pays :

Espagne

Date de début de la manifestation scientifique :

2013-09-04

Titre de la revue :

16th Euromicro Conference on Digital System Design

Date de publication :

2013

Discipline(s) HAL :

Informatique [cs]/Systèmes embarqués

Résumé en anglais : [en]

The performance of massively parallel processing system depends mostly on the control configuration that is inherently part of the system. In particular, centralized control configuration is rigid and limits system ...
Lire la suite >The performance of massively parallel processing system depends mostly on the control configuration that is inherently part of the system. In particular, centralized control configuration is rigid and limits system scalability, and distributed control configuration is difficult to control in processing elements (PEs) interaction. Maintaining a flexible autonomous computation coupled with regular synchronous communication can assure a efficient parallel processing. The master-slave control structure is specified in such a way that previous features of the massively parallel System-on-Chip (mpSoC) are preserved and performance is improved. In this paper, we define the prototyping of a master-slave control structure for mpSoC in a FPGA-based platform. The structure implementation and related experiments using the vhdl language running on virtex6 ml605 of Xilinx board are described.Lire moins >

Langue :

Anglais

Comité de lecture :

Oui

Audience :

Internationale

Vulgarisation :

Non

Collections :

Centre de Recherche en Informatique, Signal et Automatique de Lille (CRIStAL) - UMR 9189

Source :

Harvested from HAL

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