Master-Slave Control structure for massively parallel System on Chip

Krichene, Hana; Baklouti, Mouna; Dekeyser, Jean-Luc; Marquet, Philippe; Abid, Mohamed

Document type :

Communication dans un congrès avec actes

Title :

Master-Slave Control structure for massively parallel System on Chip

Author(s) :

Krichene, Hana [Auteur]
Dynamic Reconfigurable Massively Parallel Architectures and Languages [DREAMPAL]
Computer & Embedded Systems [CES Lab]
Baklouti, Mouna [Auteur]
Computer & Embedded Systems [CES Lab]
Dekeyser, Jean-Luc [Auteur]

Dynamic Reconfigurable Massively Parallel Architectures and Languages [DREAMPAL]
Marquet, Philippe [Auteur]

Dynamic Reconfigurable Massively Parallel Architectures and Languages [DREAMPAL]
Abid, Mohamed [Auteur]
Computer & Embedded Systems [CES Lab]

Conference title :

DSD SEAA - 16th Euromicro Conference on Digital System Design

City :

Santander

Country :

Espagne

Start date of the conference :

2013-09-04

Publication date :

2013

HAL domain(s) :

Informatique [cs]/Systèmes embarqués

English abstract : [en]

The performance of massively parallel processing system depends mostly on the control configuration that is inherently part of the system. In particular, centralized control configuration is rigid and limits system ...
Show more >The performance of massively parallel processing system depends mostly on the control configuration that is inherently part of the system. In particular, centralized control configuration is rigid and limits system scalability, and distributed control configuration is difficult to control in processing elements (PEs) interaction. Maintaining a flexible autonomous computation coupled with regular synchronous communication can assure a efficient parallel processing. The master-slave control structure is specified in such a way that previous features of the massively parallel System-on-Chip (mpSoC) are preserved and performance is improved. In this paper, we define the prototyping of a master-slave control structure for mpSoC in a FPGA-based platform. The structure implementation and related experiments using the vhdl language running on virtex6 ml605 of Xilinx board are described.Show less >

Language :

Anglais

Peer reviewed article :

Oui

Audience :

Internationale

Popular science :

Non

Collections :