Automatic Multi-GPU Code Generation applied to Simulation of Electrical Machines

de Oliveira Rodrigues, Antonio Wendell; Guyomarch, Frédéric; Dekeyser, Jean-Luc; Le Menach, Yvonnick

Document type :

Communication dans un congrès avec actes

Title :

Automatic Multi-GPU Code Generation applied to Simulation of Electrical Machines

Author(s) :

de Oliveira Rodrigues, Antonio Wendell [Auteur]
Contributions of the Data parallelism to real time [DART]
Guyomarch, Frédéric [Auteur]

Contributions of the Data parallelism to real time [DART]
Dekeyser, Jean-Luc [Auteur]

Contributions of the Data parallelism to real time [DART]
Le Menach, Yvonnick [Auteur]

Laboratoire d’Électrotechnique et d’Électronique de Puissance - ULR 2697 [L2EP]

Conference title :

Compumag 2011

City :

Sydney

Country :

Australie

Start date of the conference :

2011-07-12

Publication date :

2011-07-12

HAL domain(s) :

Informatique [cs]/Calcul parallèle, distribué et partagé [cs.DC]

English abstract : [en]

The electrical and electronic engineering has used parallel programming to solve its large scale complex problems for performance reasons. However, as parallel programming requires a non-trivial distribution of tasks and ...
Show more >The electrical and electronic engineering has used parallel programming to solve its large scale complex problems for performance reasons. However, as parallel programming requires a non-trivial distribution of tasks and data, developers find it hard to implement their applications effectively. Thus, in order to reduce design complexity, we propose an approach to generate code for hybrid architectures (e.g. CPU + GPU) using OpenCL, an open standard for parallel programming of heterogeneous systems. This approach is based on Model Driven Engineering (MDE) and the MARTE profile, standard proposed by Object Management Group (OMG). The aim is to provide resources to non-specialists in parallel programming to implement their applications. Moreover, thanks to model reuse capacity, we can add/change functionalities or the target architecture. Consequently, this approach helps industries to achieve their time-to-market constraints and confirms by experimental tests, performance improvements using multi-GPU environments.Show less >

Language :

Anglais

Peer reviewed article :

Oui

Audience :

Internationale

Popular science :

Non

Collections :

Centre de Recherche en Informatique, Signal et Automatique de Lille (CRIStAL) - UMR 9189

Source :

Harvested from HAL

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http://arxiv.org/pdf/1107.0538
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https://hal.inria.fr/inria-00605645/document
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https://hal.inria.fr/inria-00605645/document
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document
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compumag2011-2.pdf
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1107.0538
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