A simple method for measuring Si-Fin ...
Type de document :
Compte-rendu et recension critique d'ouvrage
Titre :
A simple method for measuring Si-Fin sidewall roughness by AFM
Auteur(s) :
Tang, X.H. [Auteur]
Université Catholique de Louvain = Catholic University of Louvain [UCL]
Bayot, V. [Auteur]
Université Catholique de Louvain = Catholic University of Louvain [UCL]
Reckinger, N. [Auteur]
Université Catholique de Louvain = Catholic University of Louvain [UCL]
Flandre, D. [Auteur]
Université Catholique de Louvain = Catholic University of Louvain [UCL]
Raskin, J.P. [Auteur]
Université Catholique de Louvain = Catholic University of Louvain [UCL]
Dubois, Emmanuel [Auteur]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Microélectronique Silicium - IEMN [MICROELEC SI - IEMN]
Nysten, B. [Auteur]
Université Catholique de Louvain = Catholic University of Louvain [UCL]
Université Catholique de Louvain = Catholic University of Louvain [UCL]
Bayot, V. [Auteur]
Université Catholique de Louvain = Catholic University of Louvain [UCL]
Reckinger, N. [Auteur]
Université Catholique de Louvain = Catholic University of Louvain [UCL]
Flandre, D. [Auteur]
Université Catholique de Louvain = Catholic University of Louvain [UCL]
Raskin, J.P. [Auteur]
Université Catholique de Louvain = Catholic University of Louvain [UCL]
Dubois, Emmanuel [Auteur]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Microélectronique Silicium - IEMN [MICROELEC SI - IEMN]
Nysten, B. [Auteur]
Université Catholique de Louvain = Catholic University of Louvain [UCL]
Titre de la revue :
IEEE Transactions on Nanotechnology
Pagination :
611-616
Éditeur :
Institute of Electrical and Electronics Engineers
Date de publication :
2009
ISSN :
1536-125X
Discipline(s) HAL :
Sciences de l'ingénieur [physics]
Résumé en anglais : [en]
The gate oxide reliability and the electrical behavior of FinFETs are directly related to the surface characteristics of the fin vertical sidewalls. The surface roughness of the fin sidewalls is one of the most important ...
Lire la suite >The gate oxide reliability and the electrical behavior of FinFETs are directly related to the surface characteristics of the fin vertical sidewalls. The surface roughness of the fin sidewalls is one of the most important structural parameters to be monitoredin order to optimize the fin patterning and postetch treatments. Because of the nanometer-scale dimensions of the fins and the vertical orientation of the sidewall surface, their roughness measurement is a serious challenge. In this paper, we describe a simple and effective method for measuring the sidewall morphology of silicon fins by conventional atomic force microscopy. The present methodology has been employed to analyze fins as etched by reactive ion etching and fins repaired by sacrificial oxidation. The results show that sacrificial oxidation not only reduces the roughness of the sidewalls, but also rounds the top corners of silicon fins. The present method can also be applied to characterize sidewall roughness of other nanostructures and materials such as the polysilicon gate of transistors or nanoelectromechanical beams.Lire moins >
Lire la suite >The gate oxide reliability and the electrical behavior of FinFETs are directly related to the surface characteristics of the fin vertical sidewalls. The surface roughness of the fin sidewalls is one of the most important structural parameters to be monitoredin order to optimize the fin patterning and postetch treatments. Because of the nanometer-scale dimensions of the fins and the vertical orientation of the sidewall surface, their roughness measurement is a serious challenge. In this paper, we describe a simple and effective method for measuring the sidewall morphology of silicon fins by conventional atomic force microscopy. The present methodology has been employed to analyze fins as etched by reactive ion etching and fins repaired by sacrificial oxidation. The results show that sacrificial oxidation not only reduces the roughness of the sidewalls, but also rounds the top corners of silicon fins. The present method can also be applied to characterize sidewall roughness of other nanostructures and materials such as the polysilicon gate of transistors or nanoelectromechanical beams.Lire moins >
Langue :
Anglais
Vulgarisation :
Non
Source :
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