CPU Port Contention Without SMT
Document type :
Communication dans un congrès avec actes
Title :
CPU Port Contention Without SMT
Author(s) :
Rokicki, Thomas [Auteur]
Security & PrIvaCY [SPICY]
Maurice, Clementine [Auteur]
Self-adaptation for distributed services and large software systems [SPIRALS]
Schwarz, Michael [Auteur]
Helmholtz Center for Information Security [Saarbrücken] [CISPA]
Security & PrIvaCY [SPICY]
Maurice, Clementine [Auteur]

Self-adaptation for distributed services and large software systems [SPIRALS]
Schwarz, Michael [Auteur]
Helmholtz Center for Information Security [Saarbrücken] [CISPA]
Conference title :
27th European Symposium on Research in Computer Security (ESORICS 2022)
City :
Copenhagen
Country :
Danemark
Start date of the conference :
2022-09-26
Journal title :
Lecture Notes in Computer Science
Publisher :
Springer Nature Switzerland
Publication date :
2022-09-24
English keyword(s) :
Side channels
CPU port contention
Browsers
Fingerprinting
CPU port contention
Browsers
Fingerprinting
HAL domain(s) :
Informatique [cs]/Cryptographie et sécurité [cs.CR]
English abstract : [en]
CPU port contention has been used in the last years as a stateless side channel to perform side-channel attacks and transient execution attacks. One drawback of this channel is that it heavily relies on simultaneous ...
Show more >CPU port contention has been used in the last years as a stateless side channel to perform side-channel attacks and transient execution attacks. One drawback of this channel is that it heavily relies on simultaneous multi-threading, which can be absent from some CPUs or simply disabled by the OS. In this paper, we present sequential port contention, which does not require SMT. It exploits sub-optimal scheduling to execution ports for instruction-level parallelization. As a result, specifically-crafted instruction sequences on a single thread suffer from an increased latency. We show that sequential port contention can be exploited from web browsers in WebAssembly. We present an automated framework to search for instruction sequences leading to sequential port contention for specific CPU generations, which we evaluated on 50 different CPUs. An attacker can use these sequences from the browser to determine the CPU generation within 12 s with a 95 % accuracy. This fingerprint is highly stable and resistant to system noise, and we show that mitigations are either expensive or only probabilistic.Show less >
Show more >CPU port contention has been used in the last years as a stateless side channel to perform side-channel attacks and transient execution attacks. One drawback of this channel is that it heavily relies on simultaneous multi-threading, which can be absent from some CPUs or simply disabled by the OS. In this paper, we present sequential port contention, which does not require SMT. It exploits sub-optimal scheduling to execution ports for instruction-level parallelization. As a result, specifically-crafted instruction sequences on a single thread suffer from an increased latency. We show that sequential port contention can be exploited from web browsers in WebAssembly. We present an automated framework to search for instruction sequences leading to sequential port contention for specific CPU generations, which we evaluated on 50 different CPUs. An attacker can use these sequences from the browser to determine the CPU generation within 12 s with a 95 % accuracy. This fingerprint is highly stable and resistant to system noise, and we show that mitigations are either expensive or only probabilistic.Show less >
Language :
Anglais
Peer reviewed article :
Oui
Audience :
Internationale
Popular science :
Non
ANR Project :
Collections :
Source :
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