Toward Accurate Analysis of Channel Charge ...
Type de document :
Communication dans un congrès avec actes
Titre :
Toward Accurate Analysis of Channel Charge Injection in SAR ADCs' Capacitive DACs
Auteur(s) :
Ahrar, Alireza [Auteur]
York University [Toronto]
Xu, Jianxiong [Auteur]
University of Toronto
Pazhouhandeh, Mohammad Reza [Auteur]
University of Toronto
Frappe, Antoine [Auteur]
Microélectronique Silicium - IEMN [MICROELEC SI - IEMN]
JUNIA [JUNIA]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Azghadi, Mostafa Rahimi [Auteur]
James Cook University [JCU]
Amirsoleimani, Amirali [Auteur]
York University [Toronto]
York University [Toronto]
Xu, Jianxiong [Auteur]
University of Toronto
Pazhouhandeh, Mohammad Reza [Auteur]
University of Toronto
Frappe, Antoine [Auteur]

Microélectronique Silicium - IEMN [MICROELEC SI - IEMN]
JUNIA [JUNIA]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Azghadi, Mostafa Rahimi [Auteur]
James Cook University [JCU]
Amirsoleimani, Amirali [Auteur]
York University [Toronto]
Titre de la manifestation scientifique :
2024 IEEE International Symposium on Circuits and Systems (ISCAS)
Ville :
Singapore
Pays :
Singapour
Date de début de la manifestation scientifique :
2024-05-19
Éditeur :
IEEE
Discipline(s) HAL :
Physique [physics]
Sciences de l'ingénieur [physics]
Sciences de l'ingénieur [physics]
Résumé en anglais : [en]
This paper conducts a detailed analysis of the impact of channel charge injection on the capacitive digital-to-analog (DAC) block in successive-approximation register (SAR) analog-to-digital converters (ADCs). It introduces ...
Lire la suite >This paper conducts a detailed analysis of the impact of channel charge injection on the capacitive digital-to-analog (DAC) block in successive-approximation register (SAR) analog-to-digital converters (ADCs). It introduces a CAD tool for distinguishing various non-idealities, quantifying channel charge injection across all possible binary output codes. It enables the implementation of more effective compensation methods rather than relying on simple dummy switches by detecting most effective switches. All simulations are conducted using Cadence TSMC 130nm CMOS technology and MATLAB software, implying on 5 to 7 dB degradation in SNDR when considering the effect of channel charge injection in 6, 9, and 12-bit typical SAR ADCs.Lire moins >
Lire la suite >This paper conducts a detailed analysis of the impact of channel charge injection on the capacitive digital-to-analog (DAC) block in successive-approximation register (SAR) analog-to-digital converters (ADCs). It introduces a CAD tool for distinguishing various non-idealities, quantifying channel charge injection across all possible binary output codes. It enables the implementation of more effective compensation methods rather than relying on simple dummy switches by detecting most effective switches. All simulations are conducted using Cadence TSMC 130nm CMOS technology and MATLAB software, implying on 5 to 7 dB degradation in SNDR when considering the effect of channel charge injection in 6, 9, and 12-bit typical SAR ADCs.Lire moins >
Langue :
Anglais
Comité de lecture :
Oui
Audience :
Internationale
Vulgarisation :
Non
Source :