Title :

High Level Design of adaptive distributed controller for Partial Dynamic reconfiguration in FPGA

Author(s) :

Cherif, Sana [Auteur correspondant]
Contributions of the Data parallelism to real time [DART]
Laboratoire d'Informatique Fondamentale de Lille [LIFL]
Trabelsi, Chiraz [Auteur]
Contributions of the Data parallelism to real time [DART]
Laboratoire d'Informatique Fondamentale de Lille [LIFL]
Meftali, Samy [Auteur]
Contributions of the Data parallelism to real time [DART]
Laboratoire d'Informatique Fondamentale de Lille [LIFL]
Dekeyser, Jean-Luc [Auteur]
Contributions of the Data parallelism to real time [DART]
Laboratoire d'Informatique Fondamentale de Lille [LIFL]

Conference title :

Proceeding of Design and Architectures for Signal and Image Processing, DASIP 2011

City :

Tampere

Country :

Finlande

Start date of the conference :

2011-11-02

Publication date :

2011-09-15

English keyword(s) :

Partial Dynamic Reconfiguration
distributed control
modularity
adaptivity
high level modeling
UML MARTE

HAL domain(s) :

Informatique [cs]/Systèmes embarqués
Informatique [cs]/Modélisation et simulation

English abstract : [en]

Controlling dynamic and partial reconfigurations becomes one of the most important key issues in modern embedded systems design. In fact, in such systems, the reconfiguration controller can significantly affect the system ...
Show more >Controlling dynamic and partial reconfigurations becomes one of the most important key issues in modern embedded systems design. In fact, in such systems, the reconfiguration controller can significantly affect the system performances. Indeed, the controller has to handle efficiently three major tasks during runtime: observation (monitoring), taking reconfiguration decisions and notify decisions to the rest of the system in order to realize it. We present in this paper a novel high level approach permitting to model, using MARTE UML profile, modular and flexible distributed controllers for dynamic reconfiguration management. This approach permits components/ models reuse and allows systematic code generation. It consequently makes reconfigurable systems design less tedious and reduces time to market.Show less >

Language :

Anglais

Peer reviewed article :

Oui

Audience :

Internationale

Popular science :

Non

Collections :

• Centre de Recherche en Informatique, Signal et Automatique de Lille (CRIStAL) - UMR 9189

Source :

Harvested from HAL