Titre :

A Source and Drain Transient Currents Technique for Trap Characterisation in AIGaN/GaN HEMTs

Auteur(s) :

Duffy, Steven [Auteur]
Liverpool John Moores University [LJMU]
Benbakhti, Brahim [Auteur]
Liverpool John Moores University [LJMU]
Zhang, Wei [Auteur]
Liverpool John Moores University [LJMU]
Kalna, Karol [Auteur]
Swansea University
Ahmeda, Khaled [Auteur]
Swansea University
Boucherta, Mohammed [Auteur]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Bourzgui, Nour-Eddine [Auteur]
Puissance - IEMN [PUISSANCE - IEMN]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Hassan, Maher, [Auteur]
Institut Interdisciplinaire d'Innovation Technologique [Sherbrooke] [3IT]
Laboratoire Nanotechnologies Nanosystèmes [LN2 ]
Soltani, Ali [Auteur]
Puissance - IEMN [PUISSANCE - IEMN]
Institut Interdisciplinaire d'Innovation Technologique [Sherbrooke] [3IT]
Laboratoire Nanotechnologies Nanosystèmes [LN2 ]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]

Titre de la manifestation scientifique :

2018 13th European Microwave Integrated Circuits Conference (EuMIC)

Ville :

Madrid

Pays :

Espagne

Date de début de la manifestation scientifique :

2018-09-23

Éditeur :

IEEE

Mot(s)-clé(s) en anglais :

Degradation
Transient analysis
HEMTs
MODFETs
Aluminum gallium nitride
Wide band gap semiconductors
Logic gates

Discipline(s) HAL :

Sciences de l'ingénieur [physics]

Résumé en anglais : [en]

The source/drain and gate induced charge trapping within an AlGaN/GaN high electron mobility transistor is studied, under normal device operation, by excluding self-heating effects, for the first time. Through direct ...
Lire la suite >The source/drain and gate induced charge trapping within an AlGaN/GaN high electron mobility transistor is studied, under normal device operation, by excluding self-heating effects, for the first time. Through direct measurement of current transients of both source and drain terminals, a characterisation technique has been developed to: (i) analyse the transient current degradations from μs to seconds, and (ii) evaluate the drain and gate induced charge trapping mechanisms. Two degradation mechanisms of current are observed: bulk trapping at a short time (<;1ms); and surface trapping and redistribution (>1ms). The bulk charge trapping is found to occur during both ON and OFF states of the device when V DS >0V; where its trapping time constant is independent of bias conditions. In addition, the time constant of the slower current degradation is found to be mainly dependent on surface trapping and redistribution, not by the second heat transient.Lire moins >

Langue :

Anglais

Comité de lecture :

Oui

Audience :

Internationale

Vulgarisation :

Non

Collections :

• Institut d'Électronique, de Microélectronique et de Nanotechnologie (IEMN) - UMR 8520

Source :

Harvested from HAL