Atomic switch : synaptic functionalities ...
Type de document :
Autre communication scientifique (congrès sans actes - poster - séminaire...): Communication dans un congrès avec actes
Titre :
Atomic switch : synaptic functionalities and integration strategies
Auteur(s) :
La Barbera, Selina [Auteur]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Guérin, David [Auteur]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Vuillaume, Dominique [Auteur]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Alibart, Fabien [Auteur]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Guérin, David [Auteur]

Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Vuillaume, Dominique [Auteur]

Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Alibart, Fabien [Auteur]

Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Titre de la manifestation scientifique :
European Materials Research Society Spring Meeting, E-MRS Spring 2014, Symposium S - Memristormaterials, mechanisms and devices for unconventional computing
Ville :
Lille
Pays :
France
Date de début de la manifestation scientifique :
2014
Discipline(s) HAL :
Sciences de l'ingénieur [physics]
Résumé en anglais : [en]
In recent years, research in the field of neuro-inspired computing has generated a lot of interest and seems to be a promising candidate to complement and to provide enhanced performances and new functionalities to the ...
Lire la suite >In recent years, research in the field of neuro-inspired computing has generated a lot of interest and seems to be a promising candidate to complement and to provide enhanced performances and new functionalities to the existing CMOS/Von Neumann processor, such as image recognition or datas classification. Engineering of memristive nano devices with specific functionalities for the implementation of synaptic operation and their integration into high density parallel network are still two big challenges for the development of neuromorphic hardware. We focus on a particular class of CB-RAM, the atomic switch that is composed by an ionic conductor material, the Ag2S, sandwiched between two metal electrodes (Ag and Pt). We characterize the tunable device volatility due to the formation/disruption of silver filaments into the ionic-conductor material under applied bias leading to short-term memory (STM) and long-term memory (LTM). Based on this simple two terminal synaptic device, we then investigate alternative route toward their integration into crossbar network. We propose a bottom-up approach of self-assembly of nanowires, an easily and faster solution with respect to the conventional e-beam lithography. Different techniques are used from surface functionalization by self-assembled monolayer to dielectrophoresis techniques in order to control the organization of the nanowires network.Lire moins >
Lire la suite >In recent years, research in the field of neuro-inspired computing has generated a lot of interest and seems to be a promising candidate to complement and to provide enhanced performances and new functionalities to the existing CMOS/Von Neumann processor, such as image recognition or datas classification. Engineering of memristive nano devices with specific functionalities for the implementation of synaptic operation and their integration into high density parallel network are still two big challenges for the development of neuromorphic hardware. We focus on a particular class of CB-RAM, the atomic switch that is composed by an ionic conductor material, the Ag2S, sandwiched between two metal electrodes (Ag and Pt). We characterize the tunable device volatility due to the formation/disruption of silver filaments into the ionic-conductor material under applied bias leading to short-term memory (STM) and long-term memory (LTM). Based on this simple two terminal synaptic device, we then investigate alternative route toward their integration into crossbar network. We propose a bottom-up approach of self-assembly of nanowires, an easily and faster solution with respect to the conventional e-beam lithography. Different techniques are used from surface functionalization by self-assembled monolayer to dielectrophoresis techniques in order to control the organization of the nanowires network.Lire moins >
Langue :
Anglais
Comité de lecture :
Oui
Audience :
Non spécifiée
Vulgarisation :
Non
Source :