Integration of PtSi in p-type MOSFETs using ...
Document type :
Article dans une revue scientifique: Article original
DOI :
Title :
Integration of PtSi in p-type MOSFETs using a sacrificial low-temperature germanidation process
Author(s) :
Breil, Nicolas [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
Microélectronique Silicium - IEMN [MICROELEC SI - IEMN]
Dubois, Emmanuel [Auteur]
Microélectronique Silicium - IEMN [MICROELEC SI - IEMN]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Halimaoui, Aomar [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
Pouydebasque, Arnaud [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
Larrieu, Guilhem [Auteur]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Laszcz, Adam [Auteur]
Ratajcak, J. [Auteur]
Skotnicki, Thomas [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
STMicroelectronics [Crolles] [ST-CROLLES]
Microélectronique Silicium - IEMN [MICROELEC SI - IEMN]
Dubois, Emmanuel [Auteur]

Microélectronique Silicium - IEMN [MICROELEC SI - IEMN]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Halimaoui, Aomar [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
Pouydebasque, Arnaud [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
Larrieu, Guilhem [Auteur]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Laszcz, Adam [Auteur]
Ratajcak, J. [Auteur]
Skotnicki, Thomas [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
Journal title :
IEEE Electron Device Letters
Pages :
152-154
Publisher :
Institute of Electrical and Electronics Engineers
Publication date :
2008
ISSN :
0741-3106
English keyword(s) :
Etching
platinum
Schottky barriers
semiconductor-metal interfaces
silicon
platinum
Schottky barriers
semiconductor-metal interfaces
silicon
HAL domain(s) :
Sciences de l'ingénieur [physics]
English abstract : [en]
In this letter, an original selective etching method of Pt with respect to PtSi using a sacrificial low-temperature germanidation process is used for the integration of valence band edge contacts in p-type MOSFET devices. ...
Show more >In this letter, an original selective etching method of Pt with respect to PtSi using a sacrificial low-temperature germanidation process is used for the integration of valence band edge contacts in p-type MOSFET devices. After silicidation annealing, the excess of Pt due to incomplete reaction with silicon or standing on insulating layers can be transformed into the PtGe2 phase. The solubility of this phase in a sulfuric peroxide mixture (SPM) with-out altering PtSi is demonstrated. The suitability and scalability of the proposed integration scheme is shown through the successful integration and characterization of PtSi source/drain contacts in p-type MOSFETs.Show less >
Show more >In this letter, an original selective etching method of Pt with respect to PtSi using a sacrificial low-temperature germanidation process is used for the integration of valence band edge contacts in p-type MOSFET devices. After silicidation annealing, the excess of Pt due to incomplete reaction with silicon or standing on insulating layers can be transformed into the PtGe2 phase. The solubility of this phase in a sulfuric peroxide mixture (SPM) with-out altering PtSi is demonstrated. The suitability and scalability of the proposed integration scheme is shown through the successful integration and characterization of PtSi source/drain contacts in p-type MOSFETs.Show less >
Language :
Anglais
Peer reviewed article :
Oui
Audience :
Non spécifiée
Popular science :
Non
Source :
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