CNTFET design of a multiple-port ternary ...
Type de document :
Compte-rendu et recension critique d'ouvrage
Titre :
CNTFET design of a multiple-port ternary register file
Auteur(s) :
Mohammaden, Amr [Auteur]
Fouda, Mohammed [Auteur]
Alouani, Lihsen [Auteur]
COMmunications NUMériques - IEMN [COMNUM - IEMN]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Said, Lobna [Auteur]
Radwan, Ahmed [Auteur]
Fouda, Mohammed [Auteur]
Alouani, Lihsen [Auteur]
COMmunications NUMériques - IEMN [COMNUM - IEMN]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Said, Lobna [Auteur]
Radwan, Ahmed [Auteur]
Titre de la revue :
Microelectronics Journal
Pagination :
105076
Éditeur :
Elsevier
Date de publication :
2021-07
ISSN :
0026-2692
Mot(s)-clé(s) en anglais :
Ternary logic gates
CNTFET
Latch
Flip flop
Dynamic
D-latch
CNTEFT
CNTFET
Latch
Flip flop
Dynamic
D-latch
CNTEFT
Discipline(s) HAL :
Sciences de l'ingénieur [physics]
Résumé en anglais : [en]
Ternary number system offers higher information processing within the same number of digits when compared to binary systems. Such advantage motivated the development of ternary processing units especially with CNTFET which ...
Lire la suite >Ternary number system offers higher information processing within the same number of digits when compared to binary systems. Such advantage motivated the development of ternary processing units especially with CNTFET which offers better power and delay results compared to CMOS-based realization. In this paper, we propose a variety of circuit realizations for the ternary memory elements that are needed in any processor including ternary D-latch, and ternary D-flip-flop. These basic building blocks are then used to design a ternary register file with multiple read and write ports. This paper is an attempt to investigate the performance aspects of using ternary RF to open the gate of more contributions and research in the direction of full ternary computer architecture. The proposed designs have been compared in terms of power, area, and latency at different supply voltages and operating temperatures.Lire moins >
Lire la suite >Ternary number system offers higher information processing within the same number of digits when compared to binary systems. Such advantage motivated the development of ternary processing units especially with CNTFET which offers better power and delay results compared to CMOS-based realization. In this paper, we propose a variety of circuit realizations for the ternary memory elements that are needed in any processor including ternary D-latch, and ternary D-flip-flop. These basic building blocks are then used to design a ternary register file with multiple read and write ports. This paper is an attempt to investigate the performance aspects of using ternary RF to open the gate of more contributions and research in the direction of full ternary computer architecture. The proposed designs have been compared in terms of power, area, and latency at different supply voltages and operating temperatures.Lire moins >
Langue :
Anglais
Vulgarisation :
Non
Source :