Integration of PtSi in p-type MOSFETs using ...
Type de document :
Article dans une revue scientifique: Article original
DOI :
Titre :
Integration of PtSi in p-type MOSFETs using a sacrificial low-temperature germanidation process
Auteur(s) :
Breil, Nicolas [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
Microélectronique Silicium - IEMN [MICROELEC SI - IEMN]
Dubois, Emmanuel [Auteur]
Microélectronique Silicium - IEMN [MICROELEC SI - IEMN]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Halimaoui, Aomar [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
Pouydebasque, Arnaud [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
Larrieu, Guilhem [Auteur]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Laszcz, Adam [Auteur]
Ratajcak, J. [Auteur]
Skotnicki, Thomas [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
STMicroelectronics [Crolles] [ST-CROLLES]
Microélectronique Silicium - IEMN [MICROELEC SI - IEMN]
Dubois, Emmanuel [Auteur]

Microélectronique Silicium - IEMN [MICROELEC SI - IEMN]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Halimaoui, Aomar [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
Pouydebasque, Arnaud [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
Larrieu, Guilhem [Auteur]
Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 [IEMN]
Laszcz, Adam [Auteur]
Ratajcak, J. [Auteur]
Skotnicki, Thomas [Auteur]
STMicroelectronics [Crolles] [ST-CROLLES]
Titre de la revue :
IEEE Electron Device Letters
Pagination :
152-154
Éditeur :
Institute of Electrical and Electronics Engineers
Date de publication :
2008
ISSN :
0741-3106
Mot(s)-clé(s) en anglais :
Etching
platinum
Schottky barriers
semiconductor-metal interfaces
silicon
platinum
Schottky barriers
semiconductor-metal interfaces
silicon
Discipline(s) HAL :
Sciences de l'ingénieur [physics]
Résumé en anglais : [en]
In this letter, an original selective etching method of Pt with respect to PtSi using a sacrificial low-temperature germanidation process is used for the integration of valence band edge contacts in p-type MOSFET devices. ...
Lire la suite >In this letter, an original selective etching method of Pt with respect to PtSi using a sacrificial low-temperature germanidation process is used for the integration of valence band edge contacts in p-type MOSFET devices. After silicidation annealing, the excess of Pt due to incomplete reaction with silicon or standing on insulating layers can be transformed into the PtGe2 phase. The solubility of this phase in a sulfuric peroxide mixture (SPM) with-out altering PtSi is demonstrated. The suitability and scalability of the proposed integration scheme is shown through the successful integration and characterization of PtSi source/drain contacts in p-type MOSFETs.Lire moins >
Lire la suite >In this letter, an original selective etching method of Pt with respect to PtSi using a sacrificial low-temperature germanidation process is used for the integration of valence band edge contacts in p-type MOSFET devices. After silicidation annealing, the excess of Pt due to incomplete reaction with silicon or standing on insulating layers can be transformed into the PtGe2 phase. The solubility of this phase in a sulfuric peroxide mixture (SPM) with-out altering PtSi is demonstrated. The suitability and scalability of the proposed integration scheme is shown through the successful integration and characterization of PtSi source/drain contacts in p-type MOSFETs.Lire moins >
Langue :
Anglais
Comité de lecture :
Oui
Audience :
Non spécifiée
Vulgarisation :
Non
Source :
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